Effective ADC Linearity Testing

Corrêa Alegria, Francisco and Moschitta, Antonio and Carbone, Paolo and Cruz Serra, Andrea and Petri, Dario (2004) Effective ADC Linearity Testing. UNSPECIFIED. (Unpublished)

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    Abstract

    This paper deals with the effectiveness of the Sinewave Histogram Test (SHT) for testing analog to Digital Converters (ADCs). The implementation is discussed, with respect to the adopted procedures and to the choice of relevant parameters. Some of the published approximations currently limiting the characterization of the test performance are removed. Furthermore the statistical efficiency of the SHT is evaluated by comparing the associated estimator variance with the corresponding Cramér-Rao Lower Bound (CRLB), theoretically derived assuming sinewaves corrupted by Gaussian noise. Finally, both simulation and experimental results are presented to validate the proposed approach.

    Item Type: Departmental Technical Report
    Department or Research center: Information Engineering and Computer Science
    Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7885 Computer Engineering
    T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK5105.5 Computer Networks
    T Technology > TK Electrical engineering. Electronics Nuclear engineering
    Uncontrolled Keywords: Sinewave Histogram Test, Cramér-Rao Lower Bound
    Report Number: DIT-04-041
    Repository staff approval on: 02 Aug 2004

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