SoftTOTEM: An FPGA Implementation of the TOTEM Parallel Processor

McBader, Stephanie and Clementel, Luca and Sartori, Alvise and Boni, Andrea and Lee, Peter (2002) SoftTOTEM: An FPGA Implementation of the TOTEM Parallel Processor. UNSPECIFIED. (Unpublished)

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    TOTEM is digital VLSI parallel processor ideally suitable for vectormatrix multiplication. As such, it provides the core computational engine for digital signal processing and artificial neural network algorithms. It has been implemented in the past as a full-custom IP core, achieving high data throughput at clock frequencies of up to 30 MHz. This paper presents the ‘soft’ implementation of the TOTEM neural chip, and compares its cost and performance to previous ‘hard’ implementations.

    Item Type: Departmental Technical Report
    Department or Research center: Information Engineering and Computer Science
    Subjects: Q Science > QA Mathematics > QA075 Electronic computers. Computer science
    T Technology > TA Engineering (General). Civil engineering (General) > TA174 Engineering Design
    Uncontrolled Keywords: Digital Electronics, Neural Networks, Learning Theory
    Additional Information: To be published in Proceedings Field Programmable logic and Applications 2002
    Report Number: DIT-02-033
    Repository staff approval on: 21 Jan 2003

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